EPM9320ARI208-10N vs EPM9320RC208-15N Comparison
Detailed side-by-side comparison of EPM9320ARI208-10N by Altera and EPM9320RC208-15N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N ObsoleteSpecification Comparison
| Parameter | EPM9320ARI208-10N | EPM9320RC208-15N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.20 | $0.00 |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Usable Gates | 6,000 | 6,000 |
| Macrocells | 320 | β |
| Logic Array Blocks (LABs) | 20 | β |
| Maximum Operating Frequency | 144.9 MHz | β |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | 15 ns |
| Supply Voltage | 4.5 V to 5.5 V | 5.0 V |
| Operating Temperature | -40 C to +85 C (industrial) | β |
| Package | 208-pin RQFP (S-PQFP-G208) | 208-pin RQFP (PowerQuad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | CMOS EEPROM | β |
| Programmability | In-system (ISP) via IEEE 1149.1 JTAG | β |
| Global Dedicated Inputs | 16 | β |
| Architecture | Multiple Array MatriX (MAX) third-generation | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status] |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macro Cells | β | 320 |
| Flip-Flops | β | 484 |
| Configurable I/O Lines | β | 128 |
| Maximum Clock Frequency | β | 117.6 MHz |
| I/O Voltage Compatibility | β | 3.3 V or 5 V |
| Configuration Technology | β | CMOS EEPROM (non-volatile) |
| In-System Programmability | β | Yes, via IEEE Std. 1149.1 JTAG |
| Terminal Pitch | β | 0.5 mm |
| Operating Temperature Range | β | 0C to +70C (commercial) |
| Packaging | β | Tray |