EPM9320LC84-10 vs EPM9320LC84-20N Comparison
Detailed side-by-side comparison of EPM9320LC84-10 by Intel and EPM9320LC84-20N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9320LC84-10
EPM9320LC84-10 - MAX 9000 EPLD, 84-PLCC, 10ns | Intel / Altera
EPM9320LC84-10 NrndIntel
EPM9320LC84-20N
EPM9320LC84-20N - 320-Cell MAX 9000 CPLD, 84-PLCC | Intel / Altera
EPM9320LC84-20N β ActiveSpecification Comparison
| Parameter | EPM9320LC84-10 | EPM9320LC84-20N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $84.96 | $10.25 |
| Family | MAX 9000 EPLD | β |
| Device | EPM9320 | β |
| Macrocells | 320 | 320 |
| Usable Gates | 6000 (typical) | 6,000 |
| Logic Array Blocks (LABs) | 16 | β |
| Maximum User I/O Pins | 168 (varies by package) | β |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | β |
| Maximum Frequency (fCNT) | [DATA_NEEDED: fCNT in MHz] | β |
| Supply Voltage (VCC) | 5.0 V (typical, see datasheet) | 5 V |
| Process Technology | 0.7 Β΅m CMOS EEPROM/UV-EPROM | β |
| Package | 84-pin PLCC (JEDEC MO-047) | β |
| Mounting Type | Surface Mount (PLCC socket also common) | Surface Mount (J-bend) |
| Operating Temperature | 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix] | 0 C to +70 C (Commercial) |
| Programming Interface | JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible | β |
| Configuration | Non-volatile EEPROM (instant-on, no boot PROM) | β |
| RoHS Status | ROHS3 Compliant (per fpgalink listing) | [DATA_NEEDED: RoHS compliance status] |
| Moisture Sensitivity Level (MSL) | MSL-3, 168 hours (per fpgalink listing) | β |
| Manufacturer Lead Time | 1-7 days (per fpgalink listing) | β |
| Series | β | MAX 9000 |
| Logic Family | β | CMOS (EEPROM-based) |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| User I/Os | β | 60 |
| Number of Pins | β | 84 |
| Package Type | β | Plastic Leaded Chip Carrier (PLCC-84, J-bend) |
| Package Code | β | QCCJ |
| Propagation Delay (tPD) | β | 16 ns |
| Internal Frequency | β | 118 MHz |
| Programming | β | 5.0-V In-System Programmable via JTAG (IEEE 1149.1) |
| Terminal Form | β | J BEND |
| MSL Level | β | [DATA_NEEDED: MSL moisture sensitivity level] |