EPM9320RC208-10 vs EPM9320RC208-20 Comparison

Detailed side-by-side comparison of EPM9320RC208-10 by Altera and EPM9320RC208-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9320RC208-10

EPM9320RC208-10 - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera

EPM9320RC208-10 Nrnd
Altera
EPM9320RC208-20

EPM9320RC208-20 - 320-Macrocell MAX 9000 CPLD, 20ns | Altera

EPM9320RC208-20 Obsolete

Specification Comparison

Parameter EPM9320RC208-10 EPM9320RC208-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $26.40 $21.90
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 6,000 6,000
Macrocells 320 320
Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] 20
Package 208-pin RQFP (RC) 208-RQFP, exposed pad (208-BFQFP)
Operating Temperature Commercial (0C to +70C) - 'C' suffix 0 Β°C to 70 Β°C (commercial)
Supply Voltage 5 V β€”
Speed Grade -10 β€”
Programming Interface JTAG (ByteBlaster/BitBlaster) β€”
Non-volatile Configuration Yes (EPROM/EEPROM based) β€”
Design Tool Support MAX+PLUS II, Quartus (legacy) β€”
RoHS Status ROHS3 Compliant (per fpgalink listing) β€”
Moisture Sensitivity Level (MSL) 3 (168 Hours) β€”
Lead Time 1-7 days (per fpgalink listing) β€”
Maximum I/O Pins β€” 132
Propagation Delay (tPD max) β€” 20 ns
Supply Voltage (VCCINT) β€” 4.75 V to 5.25 V
Programming Technology β€” EEPROM, in-system programmable (ISP)
Boundary-Scan Interface β€” IEEE Std. 1149.1 (JTAG)
Mounting Type β€” Surface Mount
Architecture β€” Multiple Array Matrix (MAX), 3rd generation
Process Technology β€” CMOS, 5.0 V EEPROM
Reprogrammability β€” Yes, unlimited ISP cycles

Datasheets & Resources

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