EPM9320RC208-15N vs EPM9320RC208-20N Comparison
Detailed side-by-side comparison of EPM9320RC208-15N by Intel and EPM9320RC208-20N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9320RC208-15N
EPM9320RC208-15N - MAX 9000 CPLD 320 Macro Cells | Intel
EPM9320RC208-15N NrndAltera
EPM9320RC208-20N
EPM9320RC208-20N - MAX 9000 CPLD 320 Macro Cells 5V | Altera
EPM9320RC208-20N ObsoleteSpecification Comparison
| Parameter | EPM9320RC208-15N | EPM9320RC208-20N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Family | MAX 9000 | β |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Usable Gates | 6,000 | 6,000 |
| Macro Cells | 320 | 320 |
| Flip-Flops | 484 | β |
| Configurable I/O Lines | 128 | β |
| Propagation Delay (tPD) | 15 ns | β |
| Maximum Clock Frequency | 117.6 MHz | β |
| Supply Voltage | 5.0 V | 5.0 V |
| I/O Voltage Compatibility | 3.3 V or 5 V | β |
| Configuration Technology | CMOS EEPROM (non-volatile) | β |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes, via IEEE Std. 1149.1 JTAG |
| Package | 208-pin RQFP (PowerQuad Flat Pack) | 208-pin RQFP (PowerQuad II) |
| Terminal Pitch | 0.5 mm | β |
| Operating Temperature Range | 0C to +70C (commercial) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Packaging | Tray | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Device Family | β | MAX 9000 |
| Logic Type | β | Complex Programmable Logic Device (CPLD) |
| Logic Array Blocks | β | 20 |
| Maximum Pin-to-Pin Delay (tPD) | β | 20 ns |
| Maximum Operating Frequency | β | 100 MHz |
| Configuration Memory | β | EEPROM (non-volatile) |
| User I/O Pins | β | 168 |
| Operating Temperature | β | [DATA_NEEDED: operating temperature range] |
| Lead Finish | β | [DATA_NEEDED: lead finish] |
| MSL Level | β | [DATA_NEEDED: MSL level] |