EPM9320RC208-15N vs EPM9480RC208-15N Comparison

Detailed side-by-side comparison of EPM9320RC208-15N by Intel and EPM9480RC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM9320RC208-15N

EPM9320RC208-15N - MAX 9000 CPLD 320 Macro Cells | Intel

EPM9320RC208-15N Nrnd
Altera
EPM9480RC208-15N

EPM9480RC208-15N - MAX 9000 CPLD 480 Macro Cells | Altera

EPM9480RC208-15N Obsolete

Specification Comparison

Parameter EPM9320RC208-15N EPM9480RC208-15N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $0.00
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 6,000 10,000
Macro Cells 320 480
Flip-Flops 484 β€”
Configurable I/O Lines 128 β€”
Propagation Delay (tPD) 15 ns β€”
Maximum Clock Frequency 117.6 MHz β€”
Supply Voltage 5.0 V 5.0 V
I/O Voltage Compatibility 3.3 V or 5 V β€”
Configuration Technology CMOS EEPROM (non-volatile) β€”
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG Yes (ISP via JTAG)
Package 208-pin RQFP (PowerQuad Flat Pack) 208-pin RQFP
Terminal Pitch 0.5 mm β€”
Operating Temperature Range 0C to +70C (commercial) β€”
Mounting Type Surface Mount Surface Mount
Packaging Tray β€”
RoHS Status [DATA_NEEDED: RoHS status] ROHS3 Compliant
Maximum Frequency β€” 117.6 MHz
Propagation Delay β€” 15 ns (speed grade -15)
Configuration Memory β€” EEPROM (non-volatile)
JTAG Interface β€” IEEE Std. 1149.1
Operating Temperature β€” [DATA_NEEDED: operating temperature range]
Moisture Sensitivity Level β€” MSL 3 (168 Hours)
Manufacturer Standard Lead Time β€” 1-7 Days
Architecture β€” Multiple Array MatriX (MAX) third-generation

Datasheets & Resources

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