EPM9320RC208-20 vs EPM9320ARI208-10 Comparison

Detailed side-by-side comparison of EPM9320RC208-20 by Altera and EPM9320ARI208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320RC208-20 EPM9320ARI208-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $21.90 $27.20
Family MAX 9000 β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 320 β€”
Logic Array Blocks (LABs) 20 β€”
Usable Gates 6,000 β€”
Maximum I/O Pins 132 β€”
Propagation Delay (tPD max) 20 ns β€”
Supply Voltage (VCCINT) 4.75 V to 5.25 V β€”
Programming Technology EEPROM, in-system programmable (ISP) β€”
Boundary-Scan Interface IEEE Std. 1149.1 (JTAG) β€”
Operating Temperature 0 Β°C to 70 Β°C (commercial) -40 C to +85 C (TA)
Package 208-RQFP, exposed pad (208-BFQFP) β€”
Mounting Type Surface Mount Surface Mount
Architecture Multiple Array Matrix (MAX), 3rd generation β€”
Process Technology CMOS, 5.0 V EEPROM β€”
Reprogrammability Yes, unlimited ISP cycles β€”
Programmable Type β€” In System Programmable (ISP)
Number of Macrocells β€” 320
Number of Logic Elements/Blocks β€” 20
Number of Gates β€” 6000
Number of I/O β€” 132
Propagation Delay tpd(1) Max β€” 10 ns
Maximum Counter Frequency β€” 144.9 MHz
Voltage Supply - Internal β€” 4.5 V to 5.5 V
Package / Case β€” 208-BFQFP Exposed Pad
Supplier Device Package β€” 208-RQFP
Configuration Memory β€” EEPROM (non-volatile)
JTAG Interface β€” IEEE Std. 1149.1 compliant
PCI Compliance β€” PCI Local Bus Specification Rev 2.2
Product Status β€” Obsolete
Packaging β€” Tray
RoHS Status β€” [DATA_NEEDED: RoHS status]

Datasheets & Resources

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