EPM9320RC208-20 vs EPM9320RC208-15N Comparison
Detailed side-by-side comparison of EPM9320RC208-20 by Altera and EPM9320RC208-15N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320RC208-20 | EPM9320RC208-15N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.90 | $0.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 320 | β |
| Logic Array Blocks (LABs) | 20 | β |
| Usable Gates | 6,000 | 6,000 |
| Maximum I/O Pins | 132 | β |
| Propagation Delay (tPD max) | 20 ns | β |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | β |
| Programming Technology | EEPROM, in-system programmable (ISP) | β |
| Boundary-Scan Interface | IEEE Std. 1149.1 (JTAG) | β |
| Operating Temperature | 0 Β°C to 70 Β°C (commercial) | β |
| Package | 208-RQFP, exposed pad (208-BFQFP) | 208-pin RQFP (PowerQuad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Architecture | Multiple Array Matrix (MAX), 3rd generation | β |
| Process Technology | CMOS, 5.0 V EEPROM | β |
| Reprogrammability | Yes, unlimited ISP cycles | β |
| Macro Cells | β | 320 |
| Flip-Flops | β | 484 |
| Configurable I/O Lines | β | 128 |
| Propagation Delay (tPD) | β | 15 ns |
| Maximum Clock Frequency | β | 117.6 MHz |
| Supply Voltage | β | 5.0 V |
| I/O Voltage Compatibility | β | 3.3 V or 5 V |
| Configuration Technology | β | CMOS EEPROM (non-volatile) |
| In-System Programmability | β | Yes, via IEEE Std. 1149.1 JTAG |
| Terminal Pitch | β | 0.5 mm |
| Operating Temperature Range | β | 0C to +70C (commercial) |
| Packaging | β | Tray |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |