EPM9320RC208-20 vs EPM9320RI208-20C Comparison

Detailed side-by-side comparison of EPM9320RC208-20 by Altera and EPM9320RI208-20C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320RC208-20 EPM9320RI208-20C
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $21.90 $22.10
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) EE PLD / CPLD
Macrocells 320 β€”
Logic Array Blocks (LABs) 20 16
Usable Gates 6,000 6,000
Maximum I/O Pins 132 β€”
Propagation Delay (tPD max) 20 ns β€”
Supply Voltage (VCCINT) 4.75 V to 5.25 V β€”
Programming Technology EEPROM, in-system programmable (ISP) β€”
Boundary-Scan Interface IEEE Std. 1149.1 (JTAG) β€”
Operating Temperature 0 Β°C to 70 Β°C (commercial) β€”
Package 208-RQFP, exposed pad (208-BFQFP) 208-pin RQFP (Plastic Quad Flat Pack)
Mounting Type Surface Mount Surface Mount
Architecture Multiple Array Matrix (MAX), 3rd generation β€”
Process Technology CMOS, 5.0 V EEPROM β€”
Reprogrammability Yes, unlimited ISP cycles β€”
Logic Elements / Macrocells β€” 320
Number of Flip-Flops β€” 484
Maximum Internal Clock Frequency β€” 100 MHz
Pin-to-Pin Propagation Delay (tPD) β€” 20 ns
Supply Voltage (VCCINT/VCCIO) β€” 5.0 V
I/O Voltage Tolerance β€” 3.3 V or 5.0 V
Programmable Interface β€” JTAG (IEEE Std. 1149.1) BST
In-System Programmability β€” Yes (5.0 V ISP via JTAG)
Technology β€” CMOS EEPROM
Operating Temperature (Industrial) β€” -40C to +85C
Lead-Free / RoHS β€” Information not confirmed from verified data [DATA_NEEDED: RoHS status]

Datasheets & Resources

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