EPM9320RC208-20N vs EPM9400RC208-20 Comparison

Detailed side-by-side comparison of EPM9320RC208-20N by Altera and EPM9400RC208-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9320RC208-20N

EPM9320RC208-20N - MAX 9000 CPLD 320 Macro Cells 5V | Altera

EPM9320RC208-20N Obsolete
Altera
EPM9400RC208-20

EPM9400RC208-20 - MAX 9000 CPLD 400 Macro Cells 20ns | Altera

EPM9400RC208-20 Obsolete

Specification Comparison

Parameter EPM9320RC208-20N EPM9400RC208-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $60.49
Device Family MAX 9000 β€”
Logic Type Complex Programmable Logic Device (CPLD) β€”
Usable Gates 6,000 8,000
Macro Cells 320 400
Logic Array Blocks 20 β€”
Maximum Pin-to-Pin Delay (tPD) 20 ns β€”
Maximum Operating Frequency 100 MHz 100 MHz
Supply Voltage 5.0 V β€”
Configuration Memory EEPROM (non-volatile) β€”
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG β€”
User I/O Pins 168 β€”
Package 208-pin RQFP (PowerQuad II) 208-pin RQFP (28x28 mm)
Mounting Type Surface Mount Surface Mount
Operating Temperature [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Lead Finish [DATA_NEEDED: lead finish] β€”
MSL Level [DATA_NEEDED: MSL level] [DATA_NEEDED: moisture sensitivity level]
Family β€” MAX 9000
Programmable Type β€” In System Programmable (ISP)
Pin-to-Pin Propagation Delay β€” 20 ns
Supply Voltage (Internal) β€” 4.75 V to 5.25 V
Configuration Technology β€” EEPROM-based (non-volatile)
JTAG Interface β€” IEEE Std. 1149.1
Supplier Device Package β€” 208-RQFP
Number of I/O Pins β€” [DATA_NEEDED: user I/O count]
Speed Grade β€” -20 (20 ns)

Datasheets & Resources

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