EPM9320RI208-20 vs EPM9320RC208-15 Comparison

Detailed side-by-side comparison of EPM9320RI208-20 by Intel and EPM9320RC208-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320RI208-20 EPM9320RC208-15
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $18.95 $0.00
Family MAX 9000 β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 320 β€”
Usable Gates 6,000 6,000
Propagation Delay (tPD) 20 ns β€”
Maximum Operating Frequency 100 MHz β€”
Supply Voltage (VCC) 5.0 V β€”
Logic Elements / LABs 20 Logic Array Blocks (16 macro cells each) β€”
Programmable Interconnect Programmable Interconnect Array (PIA) β€”
In-System Programmability Yes - IEEE 1149.1 JTAG, 5.0-V ISP Yes (ISP via JTAG)
Dedicated Input Pins 4 (low-skew global) β€”
User I/O Pins [DATA_NEEDED: I/O pin count for 208-pin RQFP] β€”
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (Power QFP)
Operating Temperature Grade Industrial β€”
Technology CMOS EEPROM β€”
Mounting Type Surface Mount Surface Mount
MSL Level [DATA_NEEDED: MSL rating] β€”
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Device Family β€” MAX 9000
Macro Cells β€” 320
Pin-to-Pin Propagation Delay β€” 15 ns (speed grade -15)
Maximum Clock Frequency β€” 117.6 MHz
Supply Voltage β€” 5.0 V
Configuration Technology β€” EEPROM-based (non-volatile)
JTAG Interface β€” IEEE Std. 1149.1
Package Type β€” 208-BFQFP Exposed Pad
Operating Temperature β€” [DATA_NEEDED: operating temperature range]
Number of I/O Pins β€” [DATA_NEEDED: user I/O count]
Logic Array Blocks β€” [DATA_NEEDED: LAB count]
Lifecycle Status β€” Obsolete (PDN0706, 2007)

Datasheets & Resources

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