EPM9400RC208-20 vs EPM9480RC208-15 Comparison

Detailed side-by-side comparison of EPM9400RC208-20 by Altera and EPM9480RC208-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9400RC208-20

EPM9400RC208-20 - MAX 9000 CPLD 400 Macro Cells 20ns | Altera

EPM9400RC208-20 Obsolete
Intel
EPM9480RC208-15

EPM9480RC208-15 - 480 Macro Cell MAX 9000 CPLD, 15ns | Intel

EPM9480RC208-15 Obsolete

Specification Comparison

Parameter EPM9400RC208-20 EPM9480RC208-15
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $60.49 $24.95
Family MAX 9000 MAX 9000
Programmable Type In System Programmable (ISP) β€”
Macro Cells 400 β€”
Usable Gates 8,000 10,000 gates
Pin-to-Pin Propagation Delay 20 ns β€”
Maximum Operating Frequency 100 MHz 117.6 MHz
Supply Voltage (Internal) 4.75 V to 5.25 V β€”
Configuration Technology EEPROM-based (non-volatile) β€”
JTAG Interface IEEE Std. 1149.1 β€”
Package 208-pin RQFP (28x28 mm) RQFP-208
Supplier Device Package 208-RQFP β€”
Mounting Type Surface Mount Surface Mount
Operating Temperature [DATA_NEEDED: operating temperature range] -40C to +85C (commercial)
Number of I/O Pins [DATA_NEEDED: user I/O count] β€”
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance status]
MSL Level [DATA_NEEDED: moisture sensitivity level] [DATA_NEEDED: MSL rating]
Speed Grade -20 (20 ns) β€”
Logic Cells / Macro Cells β€” 480 macro cells
Propagation Delay (tPD) β€” 15 ns
User I/O Pins β€” 153
Supply Voltage β€” 5.0 V
Programmability β€” In-System (ISP) via JTAG IEEE 1149.1
Configuration Memory β€” EEPROM (non-volatile)
Architecture β€” Multiple Array MatriX (MAX) - 3rd generation

Datasheets & Resources

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