EPM9400RC240-20 vs EPM9480RC240-15 Comparison
Detailed side-by-side comparison of EPM9400RC240-20 by Altera and EPM9480RC240-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9400RC240-20
EPM9400RC240-20 - 400 MC, 20 ns MAX 9000 CPLD, 240-RQFP | Altera
EPM9400RC240-20 NrndAltera
EPM9480RC240-15
EPM9480RC240-15 - MAX 9000 CPLD 480 Macro Cells 15ns | Altera
EPM9480RC240-15 ObsoleteSpecification Comparison
| Parameter | EPM9400RC240-20 | EPM9480RC240-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $23.85 | $91.68 |
| Device Family | MAX 9000 | MAX 9000 |
| Macrocells | 400 | β |
| Pin-to-Pin Delay (tPD) | 20 ns | 15 ns |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | β |
| Logic Elements / LABs | [DATA_NEEDED: number of LABs] | β |
| Programmable Type | In System Programmable (EEPROM) | In System Programmable (ISP) |
| Programming Interface | IEEE Std. 1149.1 JTAG | β |
| Package | 240-RQFP (32x32 mm) with exposed pad | 240-pin RQFP (32x32 mm) |
| Supplier Device Package | 240-RQFP | 240-RQFP (32x32) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: commercial/industrial temp grade] | [DATA_NEEDED: operating temperature range] |
| Technology | CMOS, EEPROM-based | β |
| I/O Count | [DATA_NEEDED: usable I/O count for 240-RQFP] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance per data] | RoHS non-compliant |
| Architecture | MAX (Multiple Array MatriX) - third generation | β |
| Series | MAX 9000 | β |
| Macro Cells | β | 480 |
| Usable Gates | β | 12,000 |
| Internal Supply Voltage | β | 4.75 V to 5.25 V |
| Configuration Technology | β | EEPROM-based (non-volatile) |
| JTAG Interface | β | IEEE Std. 1149.1 |
| Number of I/O Pins | β | [DATA_NEEDED: user I/O count] |
| Lead Free Status | β | [DATA_NEEDED: lead free status] |
| Logic Architecture | β | Multiple Array MatriX (MAX) third-generation |
| Supply Voltage (5.0 V nominal) | β | 5.0 V |