EPM9480RC208-15 vs EPM9480RC240-15 Comparison
Detailed side-by-side comparison of EPM9480RC208-15 by Intel and EPM9480RC240-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9480RC208-15
EPM9480RC208-15 - 480 Macro Cell MAX 9000 CPLD, 15ns | Intel
EPM9480RC208-15 ObsoleteAltera
EPM9480RC240-15
EPM9480RC240-15 - MAX 9000 CPLD 480 Macro Cells 15ns | Altera
EPM9480RC240-15 ObsoleteSpecification Comparison
| Parameter | EPM9480RC208-15 | EPM9480RC240-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $24.95 | $91.68 |
| Family | MAX 9000 | β |
| Logic Cells / Macro Cells | 480 macro cells | β |
| Usable Gates | 10,000 gates | 12,000 |
| Maximum Operating Frequency | 117.6 MHz | β |
| Propagation Delay (tPD) | 15 ns | β |
| User I/O Pins | 153 | β |
| Supply Voltage | 5.0 V | β |
| Programmability | In-System (ISP) via JTAG IEEE 1149.1 | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| Package | RQFP-208 | 240-pin RQFP (32x32 mm) |
| Operating Temperature | -40C to +85C (commercial) | [DATA_NEEDED: operating temperature range] |
| Mounting Type | Surface Mount | Surface Mount |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | RoHS non-compliant |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Programmable Type | β | In System Programmable (ISP) |
| Device Family | β | MAX 9000 |
| Macro Cells | β | 480 |
| Pin-to-Pin Delay (tPD) | β | 15 ns |
| Internal Supply Voltage | β | 4.75 V to 5.25 V |
| Configuration Technology | β | EEPROM-based (non-volatile) |
| JTAG Interface | β | IEEE Std. 1149.1 |
| Supplier Device Package | β | 240-RQFP (32x32) |
| Number of I/O Pins | β | [DATA_NEEDED: user I/O count] |
| Lead Free Status | β | [DATA_NEEDED: lead free status] |
| Logic Architecture | β | Multiple Array MatriX (MAX) third-generation |
| Supply Voltage (5.0 V nominal) | β | 5.0 V |