EPM9480RC240-15 vs EPM9480RC208-15 Comparison
Detailed side-by-side comparison of EPM9480RC240-15 by Altera and EPM9480RC208-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9480RC240-15
EPM9480RC240-15 - MAX 9000 CPLD 480 Macro Cells 15ns | Altera
EPM9480RC240-15 ObsoleteIntel
EPM9480RC208-15
EPM9480RC208-15 - 480 Macro Cell MAX 9000 CPLD, 15ns | Intel
EPM9480RC208-15 ObsoleteSpecification Comparison
| Parameter | EPM9480RC240-15 | EPM9480RC208-15 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $91.68 | $24.95 |
| Programmable Type | In System Programmable (ISP) | β |
| Device Family | MAX 9000 | β |
| Macro Cells | 480 | β |
| Usable Gates | 12,000 | 10,000 gates |
| Pin-to-Pin Delay (tPD) | 15 ns | β |
| Internal Supply Voltage | 4.75 V to 5.25 V | β |
| Configuration Technology | EEPROM-based (non-volatile) | β |
| JTAG Interface | IEEE Std. 1149.1 | β |
| Package | 240-pin RQFP (32x32 mm) | RQFP-208 |
| Supplier Device Package | 240-RQFP (32x32) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | -40C to +85C (commercial) |
| Number of I/O Pins | [DATA_NEEDED: user I/O count] | β |
| RoHS Status | RoHS non-compliant | [DATA_NEEDED: RoHS compliance status] |
| Lead Free Status | [DATA_NEEDED: lead free status] | β |
| Logic Architecture | Multiple Array MatriX (MAX) third-generation | β |
| Supply Voltage (5.0 V nominal) | 5.0 V | β |
| Family | β | MAX 9000 |
| Logic Cells / Macro Cells | β | 480 macro cells |
| Maximum Operating Frequency | β | 117.6 MHz |
| Propagation Delay (tPD) | β | 15 ns |
| User I/O Pins | β | 153 |
| Supply Voltage | β | 5.0 V |
| Programmability | β | In-System (ISP) via JTAG IEEE 1149.1 |
| Configuration Memory | β | EEPROM (non-volatile) |
| Architecture | β | Multiple Array MatriX (MAX) - 3rd generation |
| MSL Level | β | [DATA_NEEDED: MSL rating] |