EPM9480RC240-15 vs EPM9480RC240-20 Comparison
Detailed side-by-side comparison of EPM9480RC240-15 by Altera and EPM9480RC240-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9480RC240-15
EPM9480RC240-15 - MAX 9000 CPLD 480 Macro Cells 15ns | Altera
EPM9480RC240-15 ObsoleteAltera
EPM9480RC240-20
EPM9480RC240-20 - 480-Macrocell MAX 9000 CPLD, 240-RQFP | Altera
EPM9480RC240-20 NrndSpecification Comparison
| Parameter | EPM9480RC240-15 | EPM9480RC240-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $91.68 | $8.40 |
| Programmable Type | In System Programmable (ISP) | β |
| Device Family | MAX 9000 | β |
| Macro Cells | 480 | β |
| Usable Gates | 12,000 | 10,000 |
| Pin-to-Pin Delay (tPD) | 15 ns | β |
| Internal Supply Voltage | 4.75 V to 5.25 V | 4.75 V to 5.25 V |
| Configuration Technology | EEPROM-based (non-volatile) | β |
| JTAG Interface | IEEE Std. 1149.1 | β |
| Package | 240-pin RQFP (32x32 mm) | 240-RQFP (32x32 mm, FQFP, Gull Wing) |
| Supplier Device Package | 240-RQFP (32x32) | β |
| Mounting Type | Surface Mount | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | β |
| Number of I/O Pins | [DATA_NEEDED: user I/O count] | β |
| RoHS Status | RoHS non-compliant | [DATA_NEEDED: RoHS status] |
| Lead Free Status | [DATA_NEEDED: lead free status] | β |
| Logic Architecture | Multiple Array MatriX (MAX) third-generation | β |
| Supply Voltage (5.0 V nominal) | 5.0 V | β |
| Family | β | MAX 9000 |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macrocells | β | 480 |
| Logic Elements | β | 30 |
| User I/O Pins | β | 175 |
| Number of Terminals | β | 240 |
| Maximum Propagation Delay (tpd) | β | 20 ns |
| Maximum Internal Frequency (fMAX, related -C variant) | β | 100 MHz |
| Programmable Flip-Flops (family) | β | 676 |
| I/O Signaling Levels | β | 3.3 V or 5 V (configurable) |
| Process Technology | β | CMOS EEPROM |
| Programming Interface | β | In-System Programmable (ISP) via IEEE 1149.1 JTAG |
| Operating Temperature Grade | β | Commercial |
| Terminal Form | β | Gull Wing |