EPM9560ABC356-10 vs EPM9560GC280-15 Comparison
Detailed side-by-side comparison of EPM9560ABC356-10 by Altera and EPM9560GC280-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560ABC356-10
EPM9560ABC356-10 - MAX 9000 CPLD, 560 Macrocells, 356-BGA | Altera
EPM9560ABC356-10 NrndAltera
EPM9560GC280-15
EPM9560GC280-15 - MAX 9000 CPLD, 560 Macro Cells, 15ns CPGA280 | Intel / Altera
EPM9560GC280-15 ObsoleteSpecification Comparison
| Parameter | EPM9560ABC356-10 | EPM9560GC280-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $92.40 | $115.00 |
| Device Family | MAX 9000A | β |
| Product Series | MAX 9000 | β |
| Macrocells | 560 | β |
| Usable Gates | 12,000 | β |
| Logic Array Blocks (LABs) | 35 | β |
| Maximum User I/Os | 216 | β |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Maximum Counter Frequency | 144 MHz | β |
| Supply Voltage | 4.75 V to 5.25 V (5 V nominal) | β |
| Programmability | EEPROM, 5-V In-System Programmable (ISP) | In-System Programmable (ISP) via JTAG IEEE 1149.1 |
| JTAG Interface | IEEE Std. 1149.1 compliant | β |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 | β |
| Operating Temperature | 0 Β°C to 70 Β°C (Commercial) | β |
| Package | 356-LBGA (35 x 35 mm) | β |
| Mounting Type | Surface Mount | Through-Hole |
| RoHS Status | [DATA_NEEDED: rohs status] | Non-compliant (ceramic CPGA, contains lead) |
| Family | β | MAX 9000 |
| Device Type | β | EE PLD (CMOS EEPROM-based CPLD) |
| Macro Cells | β | 560 |
| Typical Gates | β | 12,000 |
| Maximum Operating Frequency | β | 117.6 MHz |
| Propagation Delay (tpd) | β | 15 ns (speed grade -15) |
| Propagation Delay (alternate datasheet figure) | β | 16.6 ns |
| Supply Voltage (VCCINT/VCCIO) | β | 5.0 V |
| Operating Temperature (Commercial) | β | 0C to +70C |
| Package Type | β | CPGA-280 (Ceramic Pin Grid Array, 280 pins) |
| Technology | β | CMOS EEPROM, 0.5 um process (MAX third-gen) |
| Architecture | β | Multiple Array MatriX (MAX) |
| Lifecycle Status | β | Obsolete (legacy Altera MAX 9000 family) |