EPM9560ARC208-10N vs EPM9560ARC208-10 Comparison
Detailed side-by-side comparison of EPM9560ARC208-10N by Altera and EPM9560ARC208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560ARC208-10N | EPM9560ARC208-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $27.20 | $0.00 |
| Family | MAX 9000 | β |
| Macrocells | 560 | 560 macrocells |
| Usable Gates | 12,000 | 12,000 gates |
| User I/O Pins | 153 | 153 I/O |
| Pin-to-Pin Delay | 10 ns | β |
| Internal Counter Frequency | 144.9 MHz | β |
| Supply Voltage | 5 V | 5.0 V |
| Technology | CMOS EEPROM | β |
| Package | 208-pin RQFP (PowerQuad II) | 208-pin RQFP (PowerQuad Flat Pack) with exposed pad |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 C to +70 C (commercial) | 0 C to +70 C (commercial) |
| Configuration Memory | EEPROM (non-volatile) | β |
| In-System Programmability | Yes (JTAG ISP) | β |
| Logic Array Blocks (LABs) | 20 | β |
| Speed Grade | -10 | β |
| RoHS Status | Compliant (N suffix) | [DATA_NEEDED: RoHS status] |
| Lead Finish | [DATA_NEEDED: lead finish] | β |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Device Family | β | MAX 9000A (Multiple Array MatriX) |
| Programmable Logic Type | β | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks | β | 35 LABs |
| Propagation Delay (tPD) | β | 10 ns (speed grade -10) |
| Internal Frequency | β | 144.9 MHz |
| Logic Family | β | CMOS |
| Configuration Technology | β | EEPROM (non-volatile, in-system programmable) |
| JTAG Interface | β | IEEE 1149.1 boundary-scan (ISP) |
| Pin Count | β | 208 pins |