EPM9560ARC208-10N vs EPM9560RC208-14 Comparison
Detailed side-by-side comparison of EPM9560ARC208-10N by Altera and EPM9560RC208-14 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560ARC208-10N
EPM9560ARC208-10N - MAX 9000 CPLD 560 Macro 208-RQFP | Altera
EPM9560ARC208-10N ObsoleteAltera
EPM9560RC208-14
EPM9560RC208-14 - MAX 9000 CPLD, 12K Gates, 560 Macrocells | Altera
EPM9560RC208-14 ObsoleteSpecification Comparison
| Parameter | EPM9560ARC208-10N | EPM9560RC208-14 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $27.20 | $27.90 |
| Family | MAX 9000 | MAX 9000 |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| User I/O Pins | 153 | 149 |
| Pin-to-Pin Delay | 10 ns | β |
| Internal Counter Frequency | 144.9 MHz | β |
| Supply Voltage | 5 V | 5 V |
| Technology | CMOS EEPROM | β |
| Package | 208-pin RQFP (PowerQuad II) | 208-pin RQFP (PQFP) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 C to +70 C (commercial) | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| In-System Programmability | Yes (JTAG ISP) | Yes (JTAG, IEEE 1149.1) |
| Logic Array Blocks (LABs) | 20 | 16 |
| Speed Grade | -10 | β |
| RoHS Status | Compliant (N suffix) | Non-compliant (legacy part) |
| Lead Finish | [DATA_NEEDED: lead finish] | β |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Maximum Operating Frequency | β | 117.6 MHz |
| Pin-to-Pin Propagation Delay | β | 14 ns |
| I/O Voltage Support | β | 3.3 V / 5 V |
| Program Memory Type | β | EEPROM (non-volatile) |
| Process Technology | β | 0.35 Β΅m CMOS EEPROM |