EPM9560ARC240-10N vs EPM9560ARI240-10N Comparison

Detailed side-by-side comparison of EPM9560ARC240-10N by Altera and EPM9560ARI240-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560ARC240-10N EPM9560ARI240-10N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $19.50 $105.00
Logic Family MAX 9000 (CPLD) CMOS, EEPROM-based
Process Technology CMOS EEPROM β€”
Macro Cells 560 β€”
User I/Os 191 216 (per digchip); 191 (per Mouser)
Logic Array Blocks (LABs) 16 16
Propagation Delay (tPD) 10 ns 10 ns (-10 speed grade)
Internal Frequency (fMAX) 145 MHz β€”
Supply Voltage (VCCINT) 5.0 V β€”
Operating Temperature 0Β°C to +70Β°C (Commercial) -40C to +85C (industrial)
Package 240-pin RQFP (32x32 mm) 240-pin RQFP (RQFP-240 / PQFP-240)
Mounting Type Surface Mount Surface Mount
Programming Interface IEEE 1149.1 JTAG / ByteBlaster β€”
Programmability In-system, EEPROM-based (non-volatile) β€”
I/O Standard 5.0 V TTL-compatible β€”
RoHS Status Non-RoHS (legacy Altera part) β€”
Family MAX 9000 MAX 9000
Product Type β€” CPLD (Complex Programmable Logic Device)
Usable Gates β€” 12,000
Macrocells β€” 560
Maximum Internal Frequency β€” 144.9 MHz (typical); 145 MHz (per digchip)
Supply Voltage β€” 5.0 V nominal (4.5 V min, 5.5 V max)
In-System Programmability β€” Yes (5.0 V ISP via JTAG)
Architecture β€” Multiple Array MatriX (MAX) - 3rd generation
JTAG (IEEE 1149.1) β€” Yes
Lead-Free / RoHS β€” [DATA_NEEDED: lead-free / RoHS status not in provided data]

Datasheets & Resources

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