EPM9560ARI240-10 vs EPM9560ARC240-10N Comparison
Detailed side-by-side comparison of EPM9560ARI240-10 by Altera and EPM9560ARC240-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560ARI240-10
EPM9560ARI240-10 - MAX 9000 CPLD 560 Macro Cells | Altera
EPM9560ARI240-10 ObsoleteAltera
EPM9560ARC240-10N
EPM9560ARC240-10N - MAX 9000 CPLD 560 Macro 191 IOs | Altera/Intel
EPM9560ARC240-10N ObsoleteSpecification Comparison
| Parameter | EPM9560ARI240-10 | EPM9560ARC240-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $19.50 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Usable Gates | 12,000 | β |
| Macro Cells | 560 | 560 |
| User I/O Pins | 191 | β |
| Package | 240-pin RQFP (PowerQuad Flat Pack) | 240-pin RQFP (32x32 mm) |
| Pin-to-Pin Propagation Delay | 10 ns | β |
| Internal Frequency | 144.9 MHz | β |
| Supply Voltage | 5.0 V | β |
| Technology | CMOS, EEPROM-based configuration | β |
| Operating Temperature Range | -40 C to +85 C (industrial) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile, instant-on) | β |
| Logic Architecture | Multiple Array MatriX (MAX) with global interconnect array | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-RoHS (legacy Altera part) |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | β |
| Number of Terminals | 240 | β |
| Terminal Form | Gull Wing | β |
| Logic Family | β | MAX 9000 (CPLD) |
| Process Technology | β | CMOS EEPROM |
| User I/Os | β | 191 |
| Logic Array Blocks (LABs) | β | 16 |
| Propagation Delay (tPD) | β | 10 ns |
| Internal Frequency (fMAX) | β | 145 MHz |
| Supply Voltage (VCCINT) | β | 5.0 V |
| Operating Temperature | β | 0Β°C to +70Β°C (Commercial) |
| Programming Interface | β | IEEE 1149.1 JTAG / ByteBlaster |
| Programmability | β | In-system, EEPROM-based (non-volatile) |
| I/O Standard | β | 5.0 V TTL-compatible |