EPM9560ARI240-10 vs EPM9560RC-10 Comparison

Detailed side-by-side comparison of EPM9560ARI240-10 by Altera and EPM9560RC-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560ARI240-10

EPM9560ARI240-10 - MAX 9000 CPLD 560 Macro Cells | Altera

EPM9560ARI240-10 Obsolete

Specification Comparison

Parameter EPM9560ARI240-10 EPM9560RC-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $110.00
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 12,000 12,000
Macro Cells 560 β€”
User I/O Pins 191 β€”
Package 240-pin RQFP (PowerQuad Flat Pack) 240-pin PGA (RC suffix)
Pin-to-Pin Propagation Delay 10 ns β€”
Internal Frequency 144.9 MHz β€”
Supply Voltage 5.0 V β€”
Technology CMOS, EEPROM-based configuration β€”
Operating Temperature Range -40 C to +85 C (industrial) β€”
Mounting Type Surface Mount Through-Hole / Socketed
Configuration Memory EEPROM (non-volatile, instant-on) β€”
Logic Architecture Multiple Array MatriX (MAX) with global interconnect array β€”
RoHS Status [DATA_NEEDED: RoHS status] unknown
Moisture Sensitivity Level [DATA_NEEDED: MSL level] β€”
Number of Terminals 240 β€”
Terminal Form Gull Wing β€”
Macrocells β€” 560
Logic Array Blocks (LABs) β€” 16
Maximum User I/O Pins β€” 212
Pin-to-Pin Delay (tPD) β€” 10 ns
Supply Voltage (VCCINT/VCCIO) β€” 5.0 V
In-System Programmability β€” IEEE 1149.1 JTAG
Process Technology β€” CMOS EEPROM
Architecture β€” Multiple Array Matrix (MAX) - third generation
Operating Temperature β€” 0C to +70C (commercial)

Datasheets & Resources

Browse All Products Create BOM Request Quote