EPM9560GC280-15 vs EPM9560ARC304-10F Comparison
Detailed side-by-side comparison of EPM9560GC280-15 by Altera and EPM9560ARC304-10F by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560GC280-15 - MAX 9000 CPLD, 560 Macro Cells, 15ns CPGA280 | Intel / Altera
EPM9560GC280-15 ObsoleteSpecification Comparison
| Parameter | EPM9560GC280-15 | EPM9560ARC304-10F |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $115.00 | $0.00 |
| Family | MAX 9000 | β |
| Device Type | EE PLD (CMOS EEPROM-based CPLD) | β |
| Macro Cells | 560 | β |
| Typical Gates | 12,000 | β |
| Maximum Operating Frequency | 117.6 MHz | β |
| Propagation Delay (tpd) | 15 ns (speed grade -15) | β |
| Propagation Delay (alternate datasheet figure) | 16.6 ns | β |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | β |
| Operating Temperature (Commercial) | 0C to +70C | β |
| Package Type | CPGA-280 (Ceramic Pin Grid Array, 280 pins) | β |
| Mounting Type | Through-Hole | Surface Mount |
| Programmability | In-System Programmable (ISP) via JTAG IEEE 1149.1 | β |
| Technology | CMOS EEPROM, 0.5 um process (MAX third-gen) | β |
| Architecture | Multiple Array MatriX (MAX) | β |
| RoHS Status | Non-compliant (ceramic CPGA, contains lead) | RoHS |
| Lifecycle Status | Obsolete (legacy Altera MAX 9000 family) | β |
| Device Family | β | MAX 9000A |
| Programmable Type | β | In System Programmable (ISP) |
| Number of Macrocells | β | 560 |
| Number of Logic Elements/Blocks | β | 35 LABs |
| Number of Gates | β | 12000 |
| Number of I/O | β | 216 |
| Maximum Delay Time (tPD) | β | 10 ns |
| Supply Voltage (Internal) | β | 4.75 V to 5.25 V |
| Operating Temperature | β | 0 C to +70 C (commercial) |
| Package | β | 304-pin RQFP (PowerQuad II) |
| Package Code | β | FQFP |
| Terminal Form | β | Gull Wing |
| Package Shape | β | Square |
| Configuration Memory | β | EEPROM (non-volatile) |
| JTAG Support | β | IEEE 1149.1 (ISP) |
| Speed Grade | β | -10 (10 ns) |