EPM9560GC280-15 vs EPM9560GI280-15 Comparison
Detailed side-by-side comparison of EPM9560GC280-15 by Altera and EPM9560GI280-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560GC280-15 - MAX 9000 CPLD, 560 Macro Cells, 15ns CPGA280 | Intel / Altera
EPM9560GC280-15 ObsoleteSpecification Comparison
| Parameter | EPM9560GC280-15 | EPM9560GI280-15 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $115.00 | $110.00 |
| Family | MAX 9000 | β |
| Device Type | EE PLD (CMOS EEPROM-based CPLD) | β |
| Macro Cells | 560 | β |
| Typical Gates | 12,000 | β |
| Maximum Operating Frequency | 117.6 MHz | β |
| Propagation Delay (tpd) | 15 ns (speed grade -15) | β |
| Propagation Delay (alternate datasheet figure) | 16.6 ns | β |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | 4.5 V to 5.5 V (3.3 V or 5 V I/O) |
| Operating Temperature (Commercial) | 0C to +70C | β |
| Package Type | CPGA-280 (Ceramic Pin Grid Array, 280 pins) | β |
| Mounting Type | Through-Hole | β |
| Programmability | In-System Programmable (ISP) via JTAG IEEE 1149.1 | β |
| Technology | CMOS EEPROM, 0.5 um process (MAX third-gen) | β |
| Architecture | Multiple Array MatriX (MAX) | CMOS EEPROM, third-generation Multiple Array MatriX (MAX) |
| RoHS Status | Non-compliant (ceramic CPGA, contains lead) | [DATA_NEEDED: RoHS status] |
| Lifecycle Status | Obsolete (legacy Altera MAX 9000 family) | β |
| Device Family | β | MAX 9000 |
| Macrocells | β | 560 |
| Flip-Flops | β | 772 |
| User I/Os | β | 216 |
| Dedicated Inputs | β | 12 |
| Logic Elements / Gates | β | 12,000 usable gates |
| Internal Frequency (fMAX) | β | 145 MHz |
| Propagation Delay (tPD) | β | 11.4 ns |
| Clock-to-Output (tCO) | β | 16.6 ns |
| In-System Programmability | β | 5.0-V ISP via JTAG |
| Package | β | 280-pin PGA (ceramic, metal-sealed cofired) |
| Operating Temperature | β | -40 Β°C to 85 Β°C (industrial) |
| Process Technology | β | CMOS EEPROM |
| Moisture Sensitivity Level (MSL) | β | MSL-3 (168 hours) |