EPM9560GI280-15 vs EPM9560GC280-15 Comparison
Detailed side-by-side comparison of EPM9560GI280-15 by Intel and EPM9560GC280-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560GC280-15 - MAX 9000 CPLD, 560 Macro Cells, 15ns CPGA280 | Intel / Altera
EPM9560GC280-15 ObsoleteSpecification Comparison
| Parameter | EPM9560GI280-15 | EPM9560GC280-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $110.00 | $115.00 |
| Device Family | MAX 9000 | β |
| Architecture | CMOS EEPROM, third-generation Multiple Array MatriX (MAX) | Multiple Array MatriX (MAX) |
| Macrocells | 560 | β |
| Flip-Flops | 772 | β |
| User I/Os | 216 | β |
| Dedicated Inputs | 12 | β |
| Logic Elements / Gates | 12,000 usable gates | β |
| Internal Frequency (fMAX) | 145 MHz | β |
| Propagation Delay (tPD) | 11.4 ns | β |
| Clock-to-Output (tCO) | 16.6 ns | β |
| Supply Voltage (VCCINT/VCCIO) | 4.5 V to 5.5 V (3.3 V or 5 V I/O) | 5.0 V |
| In-System Programmability | 5.0-V ISP via JTAG | β |
| Package | 280-pin PGA (ceramic, metal-sealed cofired) | β |
| Operating Temperature | -40 Β°C to 85 Β°C (industrial) | β |
| Process Technology | CMOS EEPROM | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic CPGA, contains lead) |
| Moisture Sensitivity Level (MSL) | MSL-3 (168 hours) | β |
| Family | β | MAX 9000 |
| Device Type | β | EE PLD (CMOS EEPROM-based CPLD) |
| Macro Cells | β | 560 |
| Typical Gates | β | 12,000 |
| Maximum Operating Frequency | β | 117.6 MHz |
| Propagation Delay (tpd) | β | 15 ns (speed grade -15) |
| Propagation Delay (alternate datasheet figure) | β | 16.6 ns |
| Operating Temperature (Commercial) | β | 0C to +70C |
| Package Type | β | CPGA-280 (Ceramic Pin Grid Array, 280 pins) |
| Mounting Type | β | Through-Hole |
| Programmability | β | In-System Programmable (ISP) via JTAG IEEE 1149.1 |
| Technology | β | CMOS EEPROM, 0.5 um process (MAX third-gen) |
| Lifecycle Status | β | Obsolete (legacy Altera MAX 9000 family) |