EPM9560RC-15 vs EPM9560RC28-15 Comparison
Detailed side-by-side comparison of EPM9560RC-15 by Altera and EPM9560RC28-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC-15 - 560-Macrocell MAX 9000 CPLD, 15ns, 240-RQFP | Altera / Intel
EPM9560RC-15 β Last Time Buy
Specification Comparison
| Parameter | EPM9560RC-15 | EPM9560RC28-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $30.10 | $135.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 560 | 212 |
| Usable Gates | 12,000 | 6,000 |
| Logic Array Blocks (LABs) | 16 (40 macrocells each) | 16 |
| Maximum User I/O Pins | 191 | β |
| Pin-to-Pin Delay (tPD1) | 15 ns | β |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5.0 V nominal) | 5.0 V |
| Operating Temperature | 0 C to +70 C (commercial) | β |
| Package | 240-pin RQFP (32x32 mm) | 28-pin ceramic windowed DIP (RC-28) |
| Mounting Type | Surface Mount | Through-Hole (DIP) |
| Programming Interface | IEEE Std. 1149.1 JTAG (ISP) | β |
| Process Technology | CMOS EEPROM | β |
| Architecture | Multiple Array MatriX (MAX) - third generation | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic windowed DIP, military/aerospace pedigree) |
| In-System Programmability | Yes (5.0 V ISP via JTAG) | Yes (JTAG IEEE 1149.1) |
| Logic Elements | β | 560 |
| Propagation Delay (tPD) | β | 15 ns |
| I/O Tolerance | β | 5.0 V (3.3 V with level shift) |
| Configuration Memory | β | EEPROM (UV-erasable window on RC package) |
| Maximum User I/O (largest package) | β | 212 |
| Operating Temperature Range | β | -40C to +85C (industrial) / military options |