EPM9560RC208-10N vs EPM9560RC208-13 Comparison
Detailed side-by-side comparison of EPM9560RC208-10N by Intel and EPM9560RC208-13 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC208-10N
EPM9560RC208-10N - MAX 9000 CPLD 560 Macro 10ns 208-RQFP | Intel
EPM9560RC208-10N β Last Time BuyAltera
EPM9560RC208-13
EPM9560RC208-13 - MAX 9000 CPLD 560 Macrocell | Altera
EPM9560RC208-13 ObsoleteSpecification Comparison
| Parameter | EPM9560RC208-10N | EPM9560RC208-13 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $175.00 | $0.00 |
| Family | MAX 9000 | β |
| Device | EPM9560 | β |
| Macro Cells | 560 | β |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 20 |
| User I/O Pins | 153 | 208 |
| Pin-to-Pin Delay (tPD1) | 10 ns | β |
| Supply Voltage (VCCINT) | 5.0 V | β |
| I/O Bank Voltage (VCCIO) | 5.0 V | β |
| Package | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | CMOS EEPROM | β |
| Programmability | In-system via IEEE 1149.1 JTAG | β |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Device Family | β | MAX 9000 EPLD |
| Macrocells | β | 560 |
| Package Code | β | RC208 |
| Speed Grade | β | -13 (13 ns pin-to-pin) |
| Propagation Delay (tPD) | β | 13 ns |
| Maximum Clock Frequency | β | 125 MHz |
| Supply Voltage | β | 5.0 V |
| Configuration Technology | β | EEPROM (non-volatile) |
| Programming Interface | β | IEEE 1149.1 JTAG |
| Operating Temperature Range | β | 0C to +70C (commercial) |
| Lead-Free Status | β | [DATA_NEEDED: lead-free status] |
| MSL Level | β | [DATA_NEEDED: MSL level] |