EPM9560RC208-13 vs EPM9560RC208-10N Comparison
Detailed side-by-side comparison of EPM9560RC208-13 by Altera and EPM9560RC208-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC208-13
EPM9560RC208-13 - MAX 9000 CPLD 560 Macrocell | Altera
EPM9560RC208-13 ObsoleteIntel
EPM9560RC208-10N
EPM9560RC208-10N - MAX 9000 CPLD 560 Macro 10ns 208-RQFP | Intel
EPM9560RC208-10N β Last Time BuySpecification Comparison
| Parameter | EPM9560RC208-13 | EPM9560RC208-10N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $175.00 |
| Device Family | MAX 9000 EPLD | β |
| Macrocells | 560 | β |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 20 | 16 |
| User I/O Pins | 208 | 153 |
| Package | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Package Code | RC208 | β |
| Speed Grade | -13 (13 ns pin-to-pin) | β |
| Propagation Delay (tPD) | 13 ns | β |
| Maximum Clock Frequency | 125 MHz | β |
| Supply Voltage | 5.0 V | β |
| Configuration Technology | EEPROM (non-volatile) | β |
| Programming Interface | IEEE 1149.1 JTAG | β |
| Operating Temperature Range | 0C to +70C (commercial) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | β |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Family | β | MAX 9000 |
| Device | β | EPM9560 |
| Macro Cells | β | 560 |
| Pin-to-Pin Delay (tPD1) | β | 10 ns |
| Supply Voltage (VCCINT) | β | 5.0 V |
| I/O Bank Voltage (VCCIO) | β | 5.0 V |
| Process Technology | β | CMOS EEPROM |
| Programmability | β | In-system via IEEE 1149.1 JTAG |
| Operating Temperature | β | [DATA_NEEDED: operating temperature grade] |