EPM9560RC208-13 vs EPM9560RC208-12 Comparison
Detailed side-by-side comparison of EPM9560RC208-13 by Altera and EPM9560RC208-12 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC208-13
EPM9560RC208-13 - MAX 9000 CPLD 560 Macrocell | Altera
EPM9560RC208-13 ObsoleteAltera
EPM9560RC208-12
EPM9560RC208-12 - MAX 9000 CPLD 560 Macrocell | Altera
EPM9560RC208-12 ObsoleteSpecification Comparison
| Parameter | EPM9560RC208-13 | EPM9560RC208-12 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Device Family | MAX 9000 EPLD | β |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12000 |
| Logic Array Blocks (LABs) | 20 | β |
| User I/O Pins | 208 | β |
| Package | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (S-PQFP-G208) |
| Package Code | RC208 | β |
| Speed Grade | -13 (13 ns pin-to-pin) | -12 (12 ns) |
| Propagation Delay (tPD) | 13 ns | 12 ns |
| Maximum Clock Frequency | 125 MHz | 125 MHz |
| Supply Voltage | 5.0 V | β |
| Configuration Technology | EEPROM (non-volatile) | β |
| Programming Interface | IEEE 1149.1 JTAG | β |
| Operating Temperature Range | 0C to +70C (commercial) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | β |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Family | β | MAX 9000 |
| Device Type | β | EEPROM-based CPLD |
| Flip-Flops | β | 772 |
| User I/O Lines | β | 153 |
| Supply Voltage (VCCINT) | β | 5 V |
| I/O Voltage Compatibility | β | 3.3 V or 5 V |
| Terminal Pitch | β | 0.50 mm |
| Operating Temperature | β | 0C to +70C (commercial) |
| Configuration Memory | β | EEPROM (non-volatile) |
| Logic Array Blocks | β | 20 |