EPM9560RC208-15 vs EPM9480RC208-15 Comparison

Detailed side-by-side comparison of EPM9560RC208-15 by Altera and EPM9480RC208-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560RC208-15

EPM9560RC208-15 - MAX 9000 CPLD 560 Macro Cells 5V | Altera

EPM9560RC208-15 Obsolete
Intel
EPM9480RC208-15

EPM9480RC208-15 - 480 Macro Cell MAX 9000 CPLD, 15ns | Intel

EPM9480RC208-15 Obsolete

Specification Comparison

Parameter EPM9560RC208-15 EPM9480RC208-15
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $24.95
Family MAX 9000 MAX 9000
Device Type EEPROM-based Complex Programmable Logic Device (CPLD) β€”
Usable Gates 12,000 gates 10,000 gates
Macro Cells 560 macro cells β€”
Pin-to-Pin Delay 15 ns β€”
Counter Speed 117.6 MHz β€”
Supply Voltage 5.0 V 5.0 V
Configuration Technology EEPROM (non-volatile) β€”
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG β€”
Package 208-pin RQFP (Power Quad Flat Pack) RQFP-208
Mounting Type Surface Mount Surface Mount
Operating Temperature [DATA_NEEDED: operating temperature range] -40C to +85C (commercial)
Number of I/O Pins [DATA_NEEDED: number of I/O pins] β€”
Logic Array Blocks [DATA_NEEDED: number of logic array blocks] β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Speed Grade -15 (15 ns pin-to-pin) β€”
Architecture Third-generation Multiple Array MatriX (MAX) Multiple Array MatriX (MAX) - 3rd generation
Logic Cells / Macro Cells β€” 480 macro cells
Maximum Operating Frequency β€” 117.6 MHz
Propagation Delay (tPD) β€” 15 ns
User I/O Pins β€” 153
Programmability β€” In-System (ISP) via JTAG IEEE 1149.1
Configuration Memory β€” EEPROM (non-volatile)
MSL Level β€” [DATA_NEEDED: MSL rating]

Datasheets & Resources

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