EPM9560RC208-15 vs EPM9560ARC208-10N Comparison

Detailed side-by-side comparison of EPM9560RC208-15 by Altera and EPM9560ARC208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560RC208-15

EPM9560RC208-15 - MAX 9000 CPLD 560 Macro Cells 5V | Altera

EPM9560RC208-15 Obsolete
Altera
EPM9560ARC208-10N

EPM9560ARC208-10N - MAX 9000 CPLD 560 Macro 208-RQFP | Altera

EPM9560ARC208-10N Obsolete

Specification Comparison

Parameter EPM9560RC208-15 EPM9560ARC208-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $27.20
Family MAX 9000 MAX 9000
Device Type EEPROM-based Complex Programmable Logic Device (CPLD) β€”
Usable Gates 12,000 gates 12,000
Macro Cells 560 macro cells β€”
Pin-to-Pin Delay 15 ns 10 ns
Counter Speed 117.6 MHz β€”
Supply Voltage 5.0 V 5 V
Configuration Technology EEPROM (non-volatile) β€”
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG Yes (JTAG ISP)
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (PowerQuad II)
Mounting Type Surface Mount Surface Mount
Operating Temperature [DATA_NEEDED: operating temperature range] 0 C to +70 C (commercial)
Number of I/O Pins [DATA_NEEDED: number of I/O pins] β€”
Logic Array Blocks [DATA_NEEDED: number of logic array blocks] β€”
RoHS Status [DATA_NEEDED: RoHS status] Compliant (N suffix)
Speed Grade -15 (15 ns pin-to-pin) -10
Architecture Third-generation Multiple Array MatriX (MAX) β€”
Macrocells β€” 560
User I/O Pins β€” 153
Internal Counter Frequency β€” 144.9 MHz
Technology β€” CMOS EEPROM
Configuration Memory β€” EEPROM (non-volatile)
Logic Array Blocks (LABs) β€” 20
Lead Finish β€” [DATA_NEEDED: lead finish]
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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