EPM9560RC208-20 vs EPM9560RC208-18 Comparison

Detailed side-by-side comparison of EPM9560RC208-20 by Intel and EPM9560RC208-18 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM9560RC208-20

EPM9560RC208-20 - MAX 9000 CPLD 560 Macrocell 20ns | Intel

EPM9560RC208-20 Obsolete
Altera
EPM9560RC208-18

EPM9560RC208-18 - MAX 9000 CPLD 560 Macro Cells 5V | Altera

EPM9560RC208-18 βœ— End of Life

Specification Comparison

Parameter EPM9560RC208-20 EPM9560RC208-18
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Eol
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $0.00
Device Family MAX 9000 (EPM9560) MAX 9000 (EPM9560)
Macrocells 560 560 macrocells
Usable Gates 12,000 12,000 gates
Logic Array Blocks 35 β€”
User I/O Pins 153 β€”
Pin-to-Pin Delay (tPD) 20 ns β€”
Maximum Clock Frequency 100 MHz β€”
Supply Voltage 5.0 V 5 V
Configuration Technology EEPROM (non-volatile) β€”
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG β€”
Package 208-pin RQFP (28x28 mm) 208-pin RQFP (Power Quad Flat Pack)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
I/O Standards 5.0 V TTL/CMOS compatible β€”
Flip-Flops 772 772 flip-flops
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
MSL Level [DATA_NEEDED: MSL level] β€”
Logic Type β€” EEPROM-based Complex Programmable Logic Device (CPLD)
Propagation Delay (tPD) β€” 18 ns (speed grade -18)
Maximum Operating Frequency β€” 117.6 MHz (family -15 grade reference)
I/O Voltage Compatibility β€” 3.3 V or 5 V
User I/O Lines β€” 149 I/O lines
Package JESD-30 Code β€” S-PQFP-G208
Configuration Memory β€” EEPROM (non-volatile, no external config PROM)
Technology β€” CMOS
Lifecycle Status β€” EOL / mature (per Altera product discontinuance notice)

Datasheets & Resources

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