EPM9560RC208-20C vs EPM9560RC208-21 Comparison

Detailed side-by-side comparison of EPM9560RC208-20C by Altera and EPM9560RC208-21 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560RC208-20C

EPM9560RC208-20C - MAX 9000 CPLD 560 Macro Cells | Altera

EPM9560RC208-20C Obsolete
Intel
EPM9560RC208-21

EPM9560RC208-21 - MAX 9000 CPLD, 560 Macrocells, 208-Pin RQFP | Intel (Altera)

EPM9560RC208-21 ⚠ Last Time Buy

Specification Comparison

Parameter EPM9560RC208-20C EPM9560RC208-21
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $22.95
Family MAX 9000 MAX 9000
Device Type EEPROM-based CPLD (EE PLD) β€”
Macrocells 560 560
Usable Gates 12,000 12,000
Flip-Flops 772 772
Configurable I/O Lines 149 β€”
Propagation Delay (tPD) 20 ns (speed grade -20) β€”
Maximum Frequency 100 MHz β€”
Supply Voltage 5.0 V 5.0 V
I/O Voltage Support 3.3 V or 5 V β€”
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG Yes (IEEE Std. 1149.1 JTAG)
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (Power Quad Flat Pack)
JESD-30 Package Code S-PQFP-G208 β€”
Terminal Form Gull Wing β€”
Operating Temperature Grade Commercial (0C to +70C) β€”
Technology CMOS CMOS EEPROM-based
Mounting Type Surface Mount β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: confirm RoHS compliance for -21 variant]
Architecture β€” Multiple Array MatriX (MAX), third-generation
Logic Array Blocks (LABs) β€” 16
Maximum User I/O β€” 149
Propagation Delay (speed grade -21) β€” 21 ns (max, per speed grade designation)
I/O Voltage Tolerance β€” 3.3 V or 5 V (per variant)
Operating Temperature β€” [DATA_NEEDED: industrial or commercial grade -21 suffix]
Security Bit β€” Yes (programmable)

Datasheets & Resources

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