EPM9560RC208-21 vs EPM9560RC208-20 Comparison

Detailed side-by-side comparison of EPM9560RC208-21 by Intel and EPM9560RC208-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM9560RC208-21

EPM9560RC208-21 - MAX 9000 CPLD, 560 Macrocells, 208-Pin RQFP | Intel (Altera)

EPM9560RC208-21 ⚠ Last Time Buy
Intel
EPM9560RC208-20

EPM9560RC208-20 - MAX 9000 CPLD 560 Macrocell 20ns | Intel

EPM9560RC208-20 Obsolete

Specification Comparison

Parameter EPM9560RC208-21 EPM9560RC208-20
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $22.95 $0.00
Family MAX 9000 β€”
Architecture Multiple Array MatriX (MAX), third-generation β€”
Technology CMOS EEPROM-based β€”
Macrocells 560 560
Usable Gates 12,000 12,000
Logic Array Blocks (LABs) 16 β€”
Flip-Flops 772 772
Maximum User I/O 149 β€”
Propagation Delay (speed grade -21) 21 ns (max, per speed grade designation) β€”
Supply Voltage 5.0 V 5.0 V
I/O Voltage Tolerance 3.3 V or 5 V (per variant) β€”
In-System Programmability Yes (IEEE Std. 1149.1 JTAG) Yes, via IEEE Std. 1149.1 JTAG
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (28x28 mm)
Operating Temperature [DATA_NEEDED: industrial or commercial grade -21 suffix] 0C to +70C (commercial)
Configuration Memory EEPROM (non-volatile) β€”
Security Bit Yes (programmable) β€”
RoHS Status [DATA_NEEDED: confirm RoHS compliance for -21 variant] [DATA_NEEDED: RoHS status]
Device Family β€” MAX 9000 (EPM9560)
Logic Array Blocks β€” 35
User I/O Pins β€” 153
Pin-to-Pin Delay (tPD) β€” 20 ns
Maximum Clock Frequency β€” 100 MHz
Configuration Technology β€” EEPROM (non-volatile)
Mounting Type β€” Surface Mount
I/O Standards β€” 5.0 V TTL/CMOS compatible
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

Browse All Products Create BOM Request Quote