EPM9560RC208-3 vs EPM9560RC208-20 Comparison

Detailed side-by-side comparison of EPM9560RC208-3 by Altera and EPM9560RC208-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560RC208-3

EPM9560RC208-3 - 560 Macrocell MAX 9000 EPLD | Intel / Altera

EPM9560RC208-3 ⚠ Last Time Buy
Intel
EPM9560RC208-20

EPM9560RC208-20 - MAX 9000 CPLD 560 Macrocell 20ns | Intel

EPM9560RC208-20 Obsolete

Specification Comparison

Parameter EPM9560RC208-3 EPM9560RC208-20
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $58.50 $0.00
Family MAX 9000 β€”
Device Type EPLD (Erasable Programmable Logic Device) β€”
Macrocells 560 560
Logic Array Blocks (LABs) 16 β€”
Usable Gates 12,000 12,000
Maximum Operating Frequency [DATA_NEEDED: f_MAX] β€”
Pin-to-Pin Delay (speed grade -3) approximately 3 ns (slowest grade) β€”
Speed Grade -3 β€”
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (28x28 mm)
I/O Voltage Tolerance 5V β€”
Process Technology 0.5 Β΅m CMOS EPROM β€”
Programming Interface ByteBlaster / BitBlaster (JTAG-compatible) β€”
Operating Temperature [DATA_NEEDED: industrial / commercial range] 0C to +70C (commercial)
RoHS Status [DATA_NEEDED] [DATA_NEEDED: RoHS status]
Lifecycle Mature / Last-time-buy (per Altera PDN for selected MAX 9000 ordering codes) β€”
Device Family β€” MAX 9000 (EPM9560)
Logic Array Blocks β€” 35
User I/O Pins β€” 153
Pin-to-Pin Delay (tPD) β€” 20 ns
Maximum Clock Frequency β€” 100 MHz
Supply Voltage β€” 5.0 V
Configuration Technology β€” EEPROM (non-volatile)
In-System Programmability β€” Yes, via IEEE Std. 1149.1 JTAG
Mounting Type β€” Surface Mount
I/O Standards β€” 5.0 V TTL/CMOS compatible
Flip-Flops β€” 772
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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