EPM9560RC208-5 vs EPM9560RC208-20 Comparison
Detailed side-by-side comparison of EPM9560RC208-5 by Altera and EPM9560RC208-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC208-5
EPM9560RC208-5 - 560-Macrocell MAX 9000 CPLD, 5ns, 5V | Altera
EPM9560RC208-5 ObsoleteIntel
EPM9560RC208-20
EPM9560RC208-20 - MAX 9000 CPLD 560 Macrocell 20ns | Intel
EPM9560RC208-20 ObsoleteSpecification Comparison
| Parameter | EPM9560RC208-5 | EPM9560RC208-20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $62.00 | $0.00 |
| Family | MAX 9000 | β |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Macro Cells | 560 | β |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | β |
| Maximum User I/O | 149 | β |
| Dedicated Inputs | 16 | β |
| Flip-Flops | 772 | 772 |
| Propagation Delay (tPD) | 5 ns | β |
| Internal Counter Frequency (fCNT) | 117.6 MHz | β |
| Supply Voltage (VCC) | 5.0 V | β |
| Package | 208-pin RQFP (Plastic Quad Flat Pack) | 208-pin RQFP (28x28 mm) |
| Process Technology | CMOS EEPROM | β |
| Programming Interface | JTAG (IEEE Std 1149.1) + 5V ISP | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS Status | Non-compliant (5V process, legacy RQFP) | [DATA_NEEDED: RoHS status] |
| Device Family | β | MAX 9000 (EPM9560) |
| Macrocells | β | 560 |
| Logic Array Blocks | β | 35 |
| User I/O Pins | β | 153 |
| Pin-to-Pin Delay (tPD) | β | 20 ns |
| Maximum Clock Frequency | β | 100 MHz |
| Supply Voltage | β | 5.0 V |
| Configuration Technology | β | EEPROM (non-volatile) |
| In-System Programmability | β | Yes, via IEEE Std. 1149.1 JTAG |
| Mounting Type | β | Surface Mount |
| I/O Standards | β | 5.0 V TTL/CMOS compatible |
| MSL Level | β | [DATA_NEEDED: MSL level] |