EPM9560RC210-20 vs EPM9560RI210-15 Comparison
Detailed side-by-side comparison of EPM9560RC210-20 by Altera and EPM9560RI210-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC210-20
EPM9560RC210-20 - MAX 9000 CPLD 560 Macrocells | Altera
EPM9560RC210-20 β Last Time BuySpecification Comparison
| Parameter | EPM9560RC210-20 | EPM9560RI210-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $60.00 | $0.00 |
| Family | MAX 9000 | MAX 9000 (EPM9560) |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 20 |
| Package | RQFP-210 (Power Quad Flat Pack, 0.5mm pitch) | 210-pin RQFP (PowerQuad) |
| Pin-to-Pin Delay (tPD) | 20 ns | 15 ns (-15 speed grade) |
| Clock-to-Output (tCO) | 12 ns | β |
| Maximum User I/O | [DATA_NEEDED: 212 I/O per datasheet, package-dependent] | β |
| Supply Voltage | 5 V | β |
| Process Technology | 0.65 um EEPROM | β |
| In-System Programmability | Yes (MAX+PLUS II flow) | Yes (JTAG ISP) |
| Boundary-Scan (JTAG) | IEEE Std 1149.1 compliant | β |
| Operating Temperature | [DATA_NEEDED: commercial 0C to 70C typical; industrial variants exist] | Industrial (-40C to +85C) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | RoHS3 Compliant (per supplier listing) | ROHS3 Compliant |
| Device Type | β | Complex Programmable Logic Device (CPLD) |
| User I/O Pins | β | 164 |
| Supply Voltage (VCCINT) | β | 5.0 V |
| I/O Voltage (MultiVolt) | β | 3.3 V / 5.0 V compatible |
| Configuration Memory | β | EEPROM (non-volatile) |
| JTAG Boundary Scan | β | IEEE 1149.1 compliant |
| Moisture Sensitivity Level (MSL) | β | 3 (168 Hours) |
| Manufacturer Standard Lead Time | β | 1-7 Days (distributor stock) |