EPM9560RC240-10N vs EPM9560RC240-15W Comparison
Detailed side-by-side comparison of EPM9560RC240-10N by Intel and EPM9560RC240-15W by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC240-10N - MAX 9000 CPLD 560 Macrocells 5V 240-Pin RQFP | Intel
EPM9560RC240-10N β Last Time BuySpecification Comparison
| Parameter | EPM9560RC240-10N | EPM9560RC240-15W |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $168.00 | $0.00 |
| Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | β |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 | β |
| User I/Os | 212 | β |
| Internal Operating Frequency | 144.9 MHz | β |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns (-10 speed grade) | β |
| Supply Voltage | 5.0 V | 4.75 V to 5.25 V |
| Process Technology | 0.65 Β΅m CMOS EEPROM | β |
| Package | 240-pin RQFP (Plastic Quad Flat Pack) | 240-pin RQFP (PowerQuad) with exposed pad |
| Programming Interface | JTAG (IEEE 1149.1) - in-system programmable | β |
| I/O Standards Supported | 5.0 V TTL/CMOS, 3.3 V PCI-compatible | β |
| Operating Temperature (Commercial) | 0 Β°C to +70 Β°C | β |
| Lead-Free Finish (N suffix) | Yes (Pb-free) | β |
| RoHS Status | ROHS3 Compliant (per fpgalink.com listing) | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level (MSL) | 3 (168 hours) | β |
| Device Type | β | Complex Programmable Logic Device (CPLD) |
| User I/O Pins | β | 191 |
| Pin-to-Pin Delay | β | 15 ns |
| Internal Frequency | β | 117.6 MHz |
| Configuration Technology | β | EEPROM (non-volatile) |
| In-System Programmability | β | Yes (ISP via JTAG) |
| Mounting Type | β | Surface Mount |
| Operating Temperature | β | 0C to +70C (commercial) |
| Logic Family | β | CMOS |
| Number of Pins | β | 240 |
| MSL Level | β | [DATA_NEEDED: MSL level] |