EPM9560RC240-12 vs EPM9560RC240-15YY Comparison
Detailed side-by-side comparison of EPM9560RC240-12 by Altera and EPM9560RC240-15YY by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC240-12 | EPM9560RC240-15YY |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $64.50 |
| Family | MAX 9000 (EPM9560) | MAX 9000A |
| Device Type | EE PLD / CPLD | β |
| Macrocells | 560 | β |
| Flip-Flops | 772 | β |
| User I/O Pins | 191 | β |
| Logic Array Blocks (LABs) | 20 | [DATA_NEEDED: LAB count for EPM9560] |
| Maximum Propagation Delay (tPD) | 13.4 ns | β |
| Speed Grade | -12 (13.4 ns tPD) | -15 |
| Maximum Operating Frequency (estimated) | ~76 MHz registered | β |
| Core Supply Voltage (VCCINT) | 5 V | β |
| I/O Logic Levels | 3.3 V or 5 V (configurable) | β |
| Package | PQFP-240 (RC240) 0.500 mm pitch, gull-wing | β |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | β |
| Programming Interface | IEEE 1149.1 JTAG | β |
| Process Technology | CMOS | β |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | 0 C to +70 C (commercial) |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | Non-RoHS (YY suffix indicates non-compliant / matte tin or SnPb lead finish per Altera legacy convention) |
| Logic Type | β | CMOS EEPROM-based CPLD |
| Number of Macrocells | β | 560 |
| Usable Gates | β | 12,000 |
| Number of User I/O | β | 191 |
| Maximum Operating Frequency | β | 117.6 MHz |
| Propagation Delay (tpd) | β | 15 ns |
| Supply Voltage (VCC) | β | 5.0 V |
| Programmability | β | In-system via IEEE 1149.1 (JTAG) |
| Package Type | β | RQFP-240 (Plastic Quad Flat Pack) |