EPM9560RC240-15C vs EPM9560RC240-15W Comparison
Detailed side-by-side comparison of EPM9560RC240-15C by Intel and EPM9560RC240-15W by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC240-15C | EPM9560RC240-15W |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD | Complex Programmable Logic Device (CPLD) |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks | 20 | β |
| User I/O Pins | 187 | 191 |
| Maximum Internal Frequency | 117.6 MHz | β |
| Propagation Delay (tPD) | 15 ns | β |
| Supply Voltage | 5.0 V | 4.75 V to 5.25 V |
| Operating Voltage Range | 3.3 V or 5 V | β |
| Package | 240-pin RQFP (PowerQuad II) | 240-pin RQFP (PowerQuad) with exposed pad |
| Terminal Pitch | 0.5 mm | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Configuration Technology | EEPROM (non-volatile) | EEPROM (non-volatile) |
| In-System Programmability | Yes (ISP via JTAG) | Yes (ISP via JTAG) |
| JTAG Interface | IEEE 1149.1 boundary-scan | β |
| Process Technology | CMOS | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| MSL Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Pin-to-Pin Delay | β | 15 ns |
| Internal Frequency | β | 117.6 MHz |
| Logic Family | β | CMOS |
| Number of Pins | β | 240 |