EPM9560RC240-15N vs EPM9560RI240-15N Comparison
Detailed side-by-side comparison of EPM9560RC240-15N by Altera and EPM9560RI240-15N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC240-15N
EPM9560RC240-15N - MAX 9000 CPLD, 560 Macrocells, 15ns, RQFP-240
EPM9560RC240-15N NrndIntel
EPM9560RI240-15N
EPM9560RI240-15N - MAX 9000 CPLD 560 Macrocell | Intel
EPM9560RI240-15N ObsoleteSpecification Comparison
| Parameter | EPM9560RC240-15N | EPM9560RI240-15N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $27.85 | $0.00 |
| Series | MAX 9000 | β |
| Family | MAX 9000 (third-generation Multiple Array MatriX) | β |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | β |
| Maximum User I/O Pins | 216 | β |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | β |
| Internal Counter Frequency (fCNT) | 145 MHz | β |
| Global Setup Time (tFSU) | [DATA_NEEDED: tFSU for -15 grade] | β |
| Clock-to-Output Time (tFCO) | [DATA_NEEDED: tFCO for -15 grade] | β |
| Supply Voltage | 5.0 V | 5.0 V |
| Logic Family | CMOS (EEPROM-based) | MAX 9000 (Multiple Array MatriX) |
| Programmability | In-system programmable (IEEE 1532/JTAG) | β |
| Boundary-Scan Test | JTAG (IEEE 1149.1) | β |
| Operating Temperature | 0C to +70C (Commercial) | β |
| Package | RQFP-240 (240-pin Plastic Quad Flat Pack) | 240-pin RQFP (PowerQuad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance - older Altera RQFP part] | RoHS3 Compliant |
| Device Type | β | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Flip-Flops | β | 772 |
| User I/O Pins | β | 216 |
| Pin-to-Pin Propagation Delay | β | 15 ns |
| Internal Frequency | β | 145 MHz |
| I/O Voltage Compatibility | β | 3.3 V or 5.0 V configurable |
| Configuration Memory | β | EEPROM (non-volatile, in-system programmable) |
| JTAG Interface | β | IEEE 1149.1 (JTAG) boundary scan |
| Operating Temperature Range | β | -40 C to +85 C (industrial) |
| Moisture Sensitivity Level | β | MSL 3 (168 hours) |
| Manufacturer Standard Lead Time | β | 1-7 days (distributor stock) |