EPM9560RC240-15W vs EPM9560RC240-15N Comparison

Detailed side-by-side comparison of EPM9560RC240-15W by Altera and EPM9560RC240-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RC240-15W EPM9560RC240-15N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $27.85
Family MAX 9000 MAX 9000 (third-generation Multiple Array MatriX)
Device Type Complex Programmable Logic Device (CPLD) β€”
Usable Gates 12,000 12,000
Macrocells 560 560
User I/O Pins 191 β€”
Pin-to-Pin Delay 15 ns β€”
Internal Frequency 117.6 MHz β€”
Supply Voltage 4.75 V to 5.25 V 5.0 V
Configuration Technology EEPROM (non-volatile) β€”
In-System Programmability Yes (ISP via JTAG) β€”
Package 240-pin RQFP (PowerQuad) with exposed pad RQFP-240 (240-pin Plastic Quad Flat Pack)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (commercial) 0C to +70C (Commercial)
Logic Family CMOS CMOS (EEPROM-based)
Number of Pins 240 β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance - older Altera RQFP part]
MSL Level [DATA_NEEDED: MSL level] β€”
Series β€” MAX 9000
Logic Array Blocks (LABs) β€” 35
Maximum User I/O Pins β€” 216
Pin-to-Pin Propagation Delay (tPD) β€” 15 ns
Internal Counter Frequency (fCNT) β€” 145 MHz
Global Setup Time (tFSU) β€” [DATA_NEEDED: tFSU for -15 grade]
Clock-to-Output Time (tFCO) β€” [DATA_NEEDED: tFCO for -15 grade]
Programmability β€” In-system programmable (IEEE 1532/JTAG)
Boundary-Scan Test β€” JTAG (IEEE 1149.1)

Datasheets & Resources

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