EPM9560RC240-20N vs EPM9560RC240-15N Comparison
Detailed side-by-side comparison of EPM9560RC240-20N by Altera and EPM9560RC240-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC240-20N
EPM9560RC240-20N - MAX 9000 CPLD 560 Macro 240-RQFP | Altera
EPM9560RC240-20N ObsoleteAltera
EPM9560RC240-15N
EPM9560RC240-15N - MAX 9000 CPLD, 560 Macrocells, 15ns, RQFP-240
EPM9560RC240-15N NrndSpecification Comparison
| Parameter | EPM9560RC240-20N | EPM9560RC240-15N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $27.85 |
| Device Family | MAX 9000 (EPM9560) | β |
| Logic Type | Complex Programmable Logic Device (CPLD) | β |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 35 | 35 |
| Maximum User I/O Pins | 216 | 216 |
| Pin-to-Pin Propagation Delay (tPD1) | 20 ns | β |
| Internal Counter Frequency (fCNT) | 144 MHz | 145 MHz |
| Flip-Flop Setup Time (tSU) | 3.0 ns | β |
| Supply Voltage | 5.0 V | 5.0 V |
| Configuration Technology | EEPROM (in-system programmable) | β |
| Package | 240-pin RQFP (PowerQuad Flat Pack) | RQFP-240 (240-pin Plastic Quad Flat Pack) |
| Operating Temperature | 0 C to +70 C (commercial) | 0C to +70C (Commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| Speed Grade | -20 (20 ns) | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance - older Altera RQFP part] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | β |
| Series | β | MAX 9000 |
| Family | β | MAX 9000 (third-generation Multiple Array MatriX) |
| Pin-to-Pin Propagation Delay (tPD) | β | 15 ns |
| Global Setup Time (tFSU) | β | [DATA_NEEDED: tFSU for -15 grade] |
| Clock-to-Output Time (tFCO) | β | [DATA_NEEDED: tFCO for -15 grade] |
| Logic Family | β | CMOS (EEPROM-based) |
| Programmability | β | In-system programmable (IEEE 1532/JTAG) |
| Boundary-Scan Test | β | JTAG (IEEE 1149.1) |