EPM9560RC304-10 vs EPM9560RC304-15F Comparison
Detailed side-by-side comparison of EPM9560RC304-10 by Intel and EPM9560RC304-15F by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC304-10
EPM9560RC304-10 - MAX 9000 CPLD, 560 Logic Elements | Intel
EPM9560RC304-10 NrndAltera
EPM9560RC304-15F
EPM9560RC304-15F - 560-Macrocell MAX 9000 CPLD, 5V, RQFP-304 | Intel
EPM9560RC304-15F ObsoleteSpecification Comparison
| Parameter | EPM9560RC304-10 | EPM9560RC304-15F |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $17.60 | $18.75 |
| Family | MAX 9000 | β |
| Device Type | CPLD / EPLD | β |
| Macrocells | 560 | 560 |
| Usable Gates | 16000 | 12,000 |
| Logic Elements | 560 | β |
| Package | RQFP-304 (RC) | RQFP-304 (304-pin Plastic QFP) |
| Pin Count | 304 | β |
| Pin-to-Pin Propagation Delay | 12 ns | β |
| Speed Grade | -10 | β |
| Supply Voltage | 5 V | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| User I/O Pins | 304 (package-limited) | 212 |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | β |
| Programming Method | JTAG in-system (ISP) | β |
| Process Technology | 0.65 Β΅m CMOS EEPROM | High-performance CMOS, EEPROM-based |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | 3 (168 Hours) | 3 (168 hours) |
| RoHS Status | ROHS3 Compliant | [DATA_NEEDED: rohs status - not stated in source] |
| Device Family | β | MAX 9000 |
| Series | β | EPM9560 |
| Propagation Delay (tpd) | β | 16.6 ns (max) |
| Maximum Internal Frequency | β | 117.6 MHz |
| Core Supply Voltage | β | 5.0 V |
| Dedicated Inputs | β | 4 |
| Logic Array Blocks (LABs) | β | 16 (40 macrocells each) |
| Programming Technology | β | 5.0 V in-system EEPROM via JTAG (IEEE 1149.1) |
| Architecture | β | Multiple Array MatriX (MAX) with PIA interconnect |
| Boundary Scan Test (BST) | β | Yes, JTAG-compliant |