EPM9560RC304-15C vs EPM9560RC304-10 Comparison

Detailed side-by-side comparison of EPM9560RC304-15C by Altera and EPM9560RC304-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560RC304-15C

EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera

EPM9560RC304-15C Obsolete
Intel
EPM9560RC304-10

EPM9560RC304-10 - MAX 9000 CPLD, 560 Logic Elements | Intel

EPM9560RC304-10 Nrnd

Specification Comparison

Parameter EPM9560RC304-15C EPM9560RC304-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $24.50 $17.60
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD / EPLD
Architecture Multiple Array MatriX (MAX), 3rd generation β€”
Usable Gates 12,000 16000
Macro Cells 560 β€”
Logic Array Blocks (LABs) 16 β€”
User I/O Pins (maximum) 212 β€”
Maximum Operating Frequency 117.6 MHz β€”
Pin-to-Pin Propagation Delay (tPD) 15 ns β€”
Supply Voltage 5.0 V 5 V
Process Technology CMOS EEPROM 0.65 Β΅m CMOS EEPROM
In-System Programmability Yes (IEEE 1149.1 JTAG) β€”
Program/Erase Endurance 100 cycles minimum β€”
Package 304-pin RQFP RQFP-304 (RC)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0 C to +70 C (Commercial) [DATA_NEEDED: operating temperature range]
RoHS Status [DATA_NEEDED: RoHS status] ROHS3 Compliant
Macrocells β€” 560
Logic Elements β€” 560
Pin Count β€” 304
Pin-to-Pin Propagation Delay β€” 12 ns
Speed Grade β€” -10
User I/O Pins β€” 304 (package-limited)
JTAG / Boundary Scan β€” IEEE 1149.1 compliant
Programming Method β€” JTAG in-system (ISP)
MSL Level β€” 3 (168 Hours)

Datasheets & Resources

Browse All Products Create BOM Request Quote