EPM9560RC304-15C vs EPM9560RC304-15F Comparison
Detailed side-by-side comparison of EPM9560RC304-15C by Altera and EPM9560RC304-15F by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoleteAltera
EPM9560RC304-15F - 560-Macrocell MAX 9000 CPLD, 5V, RQFP-304 | Intel
EPM9560RC304-15F ObsoleteSpecification Comparison
| Parameter | EPM9560RC304-15C | EPM9560RC304-15F |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $24.50 | $18.75 |
| Family | MAX 9000 | β |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Architecture | Multiple Array MatriX (MAX), 3rd generation | Multiple Array MatriX (MAX) with PIA interconnect |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | β |
| Logic Array Blocks (LABs) | 16 | 16 (40 macrocells each) |
| User I/O Pins (maximum) | 212 | β |
| Maximum Operating Frequency | 117.6 MHz | β |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | β |
| Supply Voltage | 5.0 V | β |
| Process Technology | CMOS EEPROM | High-performance CMOS, EEPROM-based |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | β |
| Program/Erase Endurance | 100 cycles minimum | β |
| Package | 304-pin RQFP | RQFP-304 (304-pin Plastic QFP) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 C to +70 C (Commercial) | -40C to +85C (industrial) |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status - not stated in source] |
| Device Family | β | MAX 9000 |
| Series | β | EPM9560 |
| Macrocells | β | 560 |
| Propagation Delay (tpd) | β | 16.6 ns (max) |
| Maximum Internal Frequency | β | 117.6 MHz |
| Core Supply Voltage | β | 5.0 V |
| User I/O Pins | β | 212 |
| Dedicated Inputs | β | 4 |
| Programming Technology | β | 5.0 V in-system EEPROM via JTAG (IEEE 1149.1) |
| Boundary Scan Test (BST) | β | Yes, JTAG-compliant |
| MSL Level | β | 3 (168 hours) |