EPM9560RC304-2 vs EPM9560RC304-15C Comparison
Detailed side-by-side comparison of EPM9560RC304-2 by Intel and EPM9560RC304-15C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoleteAltera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoleteSpecification Comparison
| Parameter | EPM9560RC304-2 | EPM9560RC304-15C |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $55.00 | $24.50 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (EPLD - Erasable PLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | Approximately 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Macrocells | [DATA_NEEDED: macrocell count] | β |
| User I/O Pins | 304 | β |
| Package | 304-pin RQFP (RC) | 304-pin RQFP |
| Speed Grade | -2 | β |
| Core Supply Voltage | 5.0 V | β |
| I/O Supply Voltage | 5.0 V | β |
| Programming Technology | EEPROM (in-system programmable) | β |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan + ISP) | β |
| Operating Temperature | Commercial (0C to +70C) | 0 C to +70 C (Commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Architecture | Multiple Array MatriX (MAX) - third generation | Multiple Array MatriX (MAX), 3rd generation |
| Configuration Memory | On-chip EEPROM (non-volatile) | β |
| Macro Cells | β | 560 |
| User I/O Pins (maximum) | β | 212 |
| Maximum Operating Frequency | β | 117.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | β | 15 ns |
| Supply Voltage | β | 5.0 V |
| Process Technology | β | CMOS EEPROM |
| In-System Programmability | β | Yes (IEEE 1149.1 JTAG) |
| Program/Erase Endurance | β | 100 cycles minimum |