EPM9560RCRC304-15 vs EPM9560RC304-5 Comparison
Detailed side-by-side comparison of EPM9560RCRC304-15 by Altera and EPM9560RC304-5 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RCRC304-15 | EPM9560RC304-5 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Device Family | MAX 9000 (EPM9560) | MAX 9000 (EPM9560) |
| Logic Type | EEPROM-based Complex Programmable Logic Device (CPLD) | β |
| Macro Cells | 560 | β |
| Usable Gates | 12,000 | 12,000 |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | β |
| Maximum Frequency | 117.6 MHz | β |
| Supply Voltage | 5.0 V | 5.0 V |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | β |
| In-System Programmability (ISP) | Yes, via IEEE Std. 1149.1 JTAG | β |
| JTAG Interface | IEEE Std. 1149.1 (built-in) | β |
| Package | 304-pin RQFP (PowerQuad Flat Pack) | 304-pin RQFP (PowerQuad II) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Number of User I/O Pins | [DATA_NEEDED: user I/O pin count] | β |
| Architecture | Third-generation Multiple Array MatriX (MAX) | β |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | [DATA_NEEDED: number of LABs] |
| RoHS Status | [DATA_NEEDED: RoHS status] | ROHS3 Compliant |
| Lead Finish | [DATA_NEEDED: lead finish] | β |
| Device Type | β | Complex Programmable Logic Device (CPLD) / EPLD |
| Macrocells | β | 560 |
| Maximum Operating Frequency | β | 117.6 MHz (family -15 grade reference) |
| Speed Grade | β | -5 (fastest grade in family) |
| Configuration Technology | β | EEPROM (non-volatile) |
| In-System Programmability | β | Yes (JTAG ISP) |
| Moisture Sensitivity Level (MSL) | β | 3 (168 Hours) |
| Manufacturer Standard Lead Time | β | 1-7 Days (distributor listing) |
| Number of I/O Pins | β | [DATA_NEEDED: number of user I/O pins] |
| Propagation Delay (tPD) | β | [DATA_NEEDED: propagation delay] |