EPM9560RI208-10 vs EPM9560RI208-20N Comparison

Detailed side-by-side comparison of EPM9560RI208-10 by Intel and EPM9560RI208-20N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RI208-10 EPM9560RI208-20N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $67.80 $0.00
Family MAX 9000 β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Maximum Counter Frequency 144 MHz β€”
Supply Voltage (VCCINT) 5.0 V β€”
User I/O Pins 212 (typical for 208-RQFP package) β€”
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP
Mounting Type Surface Mount Surface Mount
Operating Temperature -40 Β°C to +85 Β°C (Industrial) Industrial (-40C to +85C)
Programming Interface IEEE 1149.1 (JTAG) / ISP β€”
Configuration Memory EEPROM, 100 erase/program cycles β€”
RoHS Status ROHS3 Compliant [DATA_NEEDED: RoHS status]
Moisture Sensitivity Level (MSL) 3 (168 Hours) β€”
Lead Time 1-7 days (per fpgalink listing) β€”
Device Family β€” MAX 9000
Pin-to-Pin Delay β€” 20 ns (-20 speed grade)
Counter Speed β€” 100 MHz
Supply Voltage β€” 5.0 V
Configuration Technology β€” EEPROM (non-volatile)
In-System Programmability β€” Yes, via IEEE Std. 1149.1 JTAG
Development Tool β€” MAX+PLUS II
Design Entry β€” Schematic, VHDL, Verilog HDL, AHDL
Packaging β€” Tray
Logic Architecture β€” Third-generation MAX (Multiple Array MatriX)
Fabrication Process β€” Advanced CMOS

Datasheets & Resources

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