EPM9560RI208-20W vs EPM9560RI208-15 Comparison
Detailed side-by-side comparison of EPM9560RI208-20W by Intel and EPM9560RI208-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RI208-20W | EPM9560RI208-15 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $48.75 | $20.10 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Usable Gates | 12,000 | β |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 LABs of 40 macrocells each | β |
| User I/O Pins | 212 | β |
| Pin-to-Pin Delay (tPD) | 20 ns | β |
| Counter Frequency (fCNT) | 100 MHz | β |
| Speed Grade | -20 | β |
| Supply Voltage | 5.0 V | β |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes (JTAG / IEEE 1149.1) |
| Programming Technology | CMOS EEPROM | β |
| Package | 208-pin RQFP (Power Quad Flat Pack) | β |
| Operating Temperature | -40C to +85C (Industrial) | 0 Β°C to 70 Β°C (industrial grade; per package suffix R) |
| Architecture | Third-generation Multiple Array MatriX (MAX) | CMOS EEPROM-based Multiple Array MatriX (MAX) |
| Typical Usable Gates | β | 12,000 |
| User I/Os | β | 153 |
| Internal Frequency (max) | β | 145 MHz |
| Propagation Delay (tPD) | β | 11.4 ns (commercial); 15 ns speed grade |
| Logic Family | β | CMOS |
| Number of Pins | β | 208 |
| Package Code | β | HFQFP (Power Quad Flat Pack, gull-wing) |
| Package Type | β | RQFP-208 |
| Supply Voltage (VCC) | β | 5 V nominal (4.5 V to 5.5 V) |
| I/O Voltage Support | β | 3.3 V or 5 V multi-volt I/O |
| Boundary-Scan (JTAG) | β | Compliant |
| Configuration Memory | β | On-chip EEPROM (non-volatile) |
| RoHS Status | β | ROHS3 Compliant |
| Moisture Sensitivity Level (MSL) | β | 3 (168 hours) |