EPM9560RI240-15N vs EPM9560RC240-20N Comparison
Detailed side-by-side comparison of EPM9560RI240-15N by Intel and EPM9560RC240-20N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RI240-15N
EPM9560RI240-15N - MAX 9000 CPLD 560 Macrocell | Intel
EPM9560RI240-15N ObsoleteAltera
EPM9560RC240-20N
EPM9560RC240-20N - MAX 9000 CPLD 560 Macro 240-RQFP | Altera
EPM9560RC240-20N ObsoleteSpecification Comparison
| Parameter | EPM9560RI240-15N | EPM9560RC240-20N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | β |
| Logic Family | MAX 9000 (Multiple Array MatriX) | β |
| Macrocells | 560 | 560 |
| Flip-Flops | 772 | β |
| Usable Gates | 12,000 | 12,000 |
| User I/O Pins | 216 | β |
| Package | 240-pin RQFP (PowerQuad Flat Pack) | 240-pin RQFP (PowerQuad Flat Pack) |
| Pin-to-Pin Propagation Delay | 15 ns | β |
| Internal Frequency | 145 MHz | β |
| Supply Voltage | 5.0 V | 5.0 V |
| I/O Voltage Compatibility | 3.3 V or 5.0 V configurable | β |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | β |
| JTAG Interface | IEEE 1149.1 (JTAG) boundary scan | β |
| Operating Temperature Range | -40 C to +85 C (industrial) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | RoHS3 Compliant | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level | MSL 3 (168 hours) | β |
| Manufacturer Standard Lead Time | 1-7 days (distributor stock) | β |
| Device Family | β | MAX 9000 (EPM9560) |
| Logic Type | β | Complex Programmable Logic Device (CPLD) |
| Logic Array Blocks (LABs) | β | 35 |
| Maximum User I/O Pins | β | 216 |
| Pin-to-Pin Propagation Delay (tPD1) | β | 20 ns |
| Internal Counter Frequency (fCNT) | β | 144 MHz |
| Flip-Flop Setup Time (tSU) | β | 3.0 ns |
| Configuration Technology | β | EEPROM (in-system programmable) |
| Operating Temperature | β | 0 C to +70 C (commercial) |
| Speed Grade | β | -20 (20 ns) |
| Lead-Free Status | β | [DATA_NEEDED: lead-free status] |